u-boot-2011.06在基於s3c2440開發板的移植之支持NandFlash讀寫

在“NorFlash啟動”一文中，我們把drivers/mtd/nand/s3c2410_nand.c文件復制為s3c2440_nand.c文件，並把該文件內的所有有關“2410”的地方一律改為“2440”。這麼修改僅僅是能夠讓系統編譯成功，並沒有真正實現NandFlash的讀寫。在這裡，我們就來介紹如何讓u-boot支持NandFlash的讀寫。

相關閱讀：

U-Boot源代碼下載地址 http://www.linuxidc.com/Linux/2011-07/38897.htm

U-Boot-2011.06啟動流程分析 http://www.linuxidc.com/Linux/2011-07/39310.htm

u-boot-2011.06在基於s3c2440開發板的移植之編譯配置 http://www.linuxidc.com/Linux/2011-10/45455.htm

u-boot-2011.06在基於s3c2440開發板的移植之NorFlash啟動 http://www.linuxidc.com/Linux/2011-10/45456.htm

u-boot-2011.06在基於S3C2440開發板的移植之解決raise: Signal # 8 caught http://www.linuxidc.com/Linux/2011-10/454554.htm

u-boot-2011.06在基於s3c2440開發板的移植之支持NandFlash讀寫 http://www.linuxidc.com/Linux/2011-10/45457.htm

u-boot-2011.06在基於s3c2440開發板的移植之硬件ECC http://www.linuxidc.com/Linux/2011-10/454558.htm

由於s3c2410與s3c2440的NandFlash控制器不一樣，因此s3c2440_nand.c文件並不能直接應用，需要進行適當的修改，而主要修改的內容就是s3c2440的相關寄存器。

首先重新定義要用到的寄存器，把原文中第27行至第37行之間的宏定義去掉，改為下面的形式：

#define S3C2440_NFCONT_SECCL       (1<<6)

#define S3C2440_NFCONT_MECCL       (1<<5)

#define S3C2440_NFCONT_INITECC     (1<<4)

#define S3C2440_NFCONT_nCE         (1<<1)

#define S3C2440_NFCONT_MODE        (1<<0)

#define S3C2440_NFCONF_TACLS(x)    ((x)<<12)

#define S3C2440_NFCONF_TWRPH0(x)   ((x)<<8)

#define S3C2440_NFCONF_TWRPH1(x)   ((x)<<4)

#define S3C2440_ADDR_NALE        0x08

#define S3C2440_ADDR_NCLE       0x0C

然後就是修改s3c2440_hwcontrol函數和board_nand_init函數，其他函數不變。

board_nand_init函數主要是用於對NandFlash的初始化，對它修改的內容是對寄存器NFCONF和寄存器NFCONT的修改，如下所示為修改後的board_nand_init函數，其中紅色標注的地方為修改的地方：

int   board_nand_init(struct nand_chip *nand)

{

       u_int32_t cfg;

       u_int8_t tacls, twrph0, twrph1;

       struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();

       struct s3c2440_nand *nand_reg = s3c2440_get_base_nand();

       debugX(1,"board_nand_init()\n");

       writel(readl(&clk_power->clkcon) |(1 << 4), &clk_power->clkcon);

       /* initialize hardware */

#ifdefined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)

       tacls = CONFIG_S3C24XX_TACLS;

       twrph0 = CONFIG_S3C24XX_TWRPH0;

       twrph1 = CONFIG_S3C24XX_TWRPH1;

#else

       tacls = 2;

       twrph0 = 3;

       twrph1 = 1;

#endif

       cfg = S3C2440_NFCONF_TACLS(tacls - 1);

       cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);

       cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);

       writel(cfg,&nand_reg->nfconf);

       cfg = S3C2440_NFCONT_SECCL;

       cfg |= S3C2440_NFCONT_MECCL;

       cfg |= S3C2440_NFCONT_MODE;

       writel(cfg,&nand_reg->nfcont);

       /* initialize nand_chip data structure */

       nand->IO_ADDR_R = (void*)&nand_reg->nfdata;

       nand->IO_ADDR_W = (void*)&nand_reg->nfdata;

       nand->select_chip = NULL;

       /* read_buf and write_buf are default */

       /* read_byte and write_byte are default*/

#ifdefCONFIG_NAND_SPL

       nand->read_buf = nand_read_buf;

#endif

       /* hwcontrol always must be implemented*/

       nand->cmd_ctrl = s3c2440_hwcontrol;

       nand->dev_ready = s3c2440_dev_ready;

#ifdefCONFIG_S3C2440_NAND_HWECC

       nand->ecc.hwctl = s3c2440_nand_enable_hwecc;

       nand->ecc.calculate = s3c2440_nand_calculate_ecc;

       nand->ecc.correct = s3c2440_nand_correct_data;

       nand->ecc.mode = NAND_ECC_HW;

       nand->ecc.size =CONFIG_SYS_NAND_ECCSIZE;

       nand->ecc.bytes =CONFIG_SYS_NAND_ECCBYTES;

#else

       nand->ecc.mode = NAND_ECC_SOFT;

#endif

#ifdef CONFIG_S3C2440_NAND_BBT

       nand->options = NAND_USE_FLASH_BBT;

#else

       nand->options = 0;

#endif

       debugX(1, "end ofnand_init\n");

       return 0;

}